1. Field of the Invention
The present invention relates to a data transmission apparatus, more particularly to a serial data transmission apparatus for transferring serial data at high speeds.
2. Description of the Related Art
Serial data transmission enables transmission of a signal by one or two transmission media, so is superior in terms of saving space. Further, it is free from the problem of skew (deviation in timing) occurring between data when transmitting a signal by a multicore signal transmission line, so is suited to long distance data transmission.
FIG. 1 is a view showing the configuration of a general serial data transmission apparatus. The illustrated data transmission apparatus is comprised of a transmitter unit 10, a transmission line 20, and a receiver unit 30. The transmitter unit 10 is in turn comprised of a parallel/serial conversion circuit 11 and a transmission clock generating circuit 12, while the receiver unit 30 is comprised of a serial/parallel conversion circuit 31 and a clock recovery circuit 32.
The transmission line 20 is comprised of a pair of signal lines, for example, a shield twisted pair (STP) or an unshielded twisted pair (UTP).
At the time of transmitting data, the for example n bits of transmission data input to the transmitter unit 10 is converted to serial data by the parallel/serial conversion circuit 11 in synchronization with the transmission clock signal TCK and output to the transmission line 20.
The transmission clock generating circuit 12 is for example comprised of a PLL circuit. It receives the synchronization clock signal CLK and in accordance with the same generates the transmission clock signal TCK which it outputs to the parallel/serial conversion circuit 11.
The receiver unit 30 receives the serial data transmitted from the transmission line 20 and converts it to n bits of data by the serial/parallel conversion circuit 31 for output.
The clock recovery circuit 32 is for example comprised of a PLL circuit. It reproduces a reception clock signal LCK having the same frequency as the transmission clock signal TCK based on the transmission data of the transmission line 20 and supplies it to the serial/parallel conversion circuit 31.
Using the above data transmission apparatus, the transmission data can be transmitted over the pair of transmission paths at a high speed and the space taken by the transmission line can be reduced. Further, there is little distortion of the data and long distance data transmission can be realized.
The above mentioned data transmission apparatus of the related art, however, suffers from the problem that the receiver unit 30 requires a circuit for extracting a clock signal from the transmission data in order to accurately receive the data transmitted from the transmitter unit 10, that is, a clock recovery circuit 32.
The clock recovery circuit 32 can be comprised of a band pass filter or PLL circuit having a high Q value.
When configuring the clock recovery circuit 32 by a band pass filter, the typical method used is to filter the differentiated signal of received signal by a surface acoustic wave (SAW) filter etc. to extract the clock signal. With this method, there is the restriction that it cannot be applied to transmission rates other than the center frequency of the SAW filter.
When configuring the clock recovery circuit 32 by a PLL circuit, the clock signal is extracted by controlling the phase of the received signal and the phase of the output of the voltage controlled oscillator (VCO) to be equal. With this method, there is the advantage that it is possible to handle a variety of data transmission rates by widening the range of oscillation frequencies of the VCO.
When the frequency of the VCO deviates widely from the frequency of the reception signal, however, the phase comparing means, which is designed envisioning a serial data signal of a random bit stream, becomes confused. The VCO then drifts or is locked to a frequency of a whole multiple of the transmission rate and it becomes impossible to accurately extract the transmission clock signal TCK.
To deal with the above problems, the method adopted has been to give to the receiver unit 30 a reference clock signal having a frequency of a specific ratio with the rate of the transmitted signal to lock the PLL circuit in the initialized state of the receiver unit 30. Even with this method, however, when the transmission rate of the serial data transmitted by the transmitter is not known, it is not possible to set the frequency of the reference clock signal, so a separate means becomes necessary for transmitting information relating to the transmission rate.